S32K系列S32K144学习笔记（GPIO学习之二）
本例程基以下如图所示接口操作，MCU为S32K144，开发平台S32DSworkspace
功能描述：检测信号输入，如有低电平信号输入，则亮灯，无低电平信号，则灭灯
如有错误，麻烦帮忙指出，谢谢！
#include "S32K144.h" /* include peripheral declarations S32K144 */
#include "s32_core_cm4.h"
void WDOG_disable (void)
{
WDOG->CNT=0xD928C520; //解锁看门狗
WDOG->TOVAL=0x0000FFFF; //把时间配置为最大
WDOG->CS = 0x00002100; //关闭看门狗
}
void SOSC_init_8MHz(void)
{
SCG->SOSCDIV=0x00000101; // SOSCDIV1 & SOSCDIV2 =1: divide by 1
SCG->SOSCCFG=0x00000024; /* Range=2: Medium freq (SOSC betw 1MHz-8MHz)*/
/* HGO=0: Config xtal osc for low power */
/* EREFS=1: Input is external XTAL */
while(SCG->SOSCCSR & SCG_SOSCCSR_LK_MASK); /* Ensure SOSCCSR unlocked */
SCG->SOSCCSR=0x00000001; /* LK=0: SOSCCSR can be written */
/* SOSCCMRE=0: OSC CLK monitor IRQ if enabled */
/* SOSCCM=0: OSC CLK monitor disabled */
/* SOSCERCLKEN=0: Sys OSC 3V ERCLK output clk disabled */
/* SOSCLPEN=0: Sys OSC disabled in VLP modes */
/* SOSCSTEN=0: Sys OSC disabled in Stop modes */
/* SOSCEN=1: Enable oscillator */
while(!(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); /* Wait for sys OSC clk valid */
}
void SPLL_init_160MHz(void)
{
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000000; /* SPLLEN=0: SPLL is disabled (default) */
SCG->SPLLDIV = 0x00000302; /* SPLLDIV1 divide by 2; SPLLDIV2 divide by 4 */
SCG->SPLLCFG = 0x00180000; /* PREDIV=0: Divide SOSC_CLK by 0+1=1 */
/* MULT=24: Multiply sys pll by 4+24=40 */
/* SPLL_CLK = 8MHz / 1 * 40 / 2 = 160 MHz */
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000001; /* LK=0: SPLLCSR can be written */
/* SPLLCMRE=0: SPLL CLK monitor IRQ if enabled */
/* SPLLCM=0: SPLL CLK monitor disabled */
/* SPLLSTEN=0: SPLL disabled in Stop modes */
/* SPLLEN=1: Enable SPLL */
while(!(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK)); /* Wait for SPLL valid */
}
void NormalRUNmode_40MHz (void)
{
/* Change to normal RUN mode with 8MHz SOSC, 80 MHz PLL*/
SCG->RCCR=SCG_RCCR_SCS(6) /* PLL as clock source*/
|SCG_RCCR_DIVCORE(0b11) /* DIVCORE=3, div. by 4: Core clock = 160/4 MHz = 40 MHz*/
|SCG_RCCR_DIVBUS(0b11) /* DIVBUS=3, div. by 4: bus clock = 160/4 MHz = 40 MHz*/
|SCG_RCCR_DIVSLOW(0b111); /* DIVSLOW=7, div. by 8: SCG slow, flash clock= 160/8 MHz = 20MHZ*/
while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 6) {}
/* Wait for sys clk src = SPLL */
}
/*相关端口配置*/
void GPIO_Init(void)
{
/*****LED——PTE9端口配置*****/
PCC->PCCn[PCC_PORTE_INDEX] |= PCC_PCCn_CGC_MASK; //使能PTE端口时钟
PTE->PDDR |= (1<<9); //配置PTE9为输出端口
PORTE->PCR[9] = 0x00000100; //配置PTE9为GPIO，不使用其他复用功能
PTE->PDOR &= ~(1<<9); //PTE9输出低电平
/*******PTD13端口配置*******/
PCC->PCCn[PCC_PORTD_INDEX] |= PCC_PCCn_CGC_MASK; //使能PTD端口时钟
PTD->PDDR &= ~(1<<13); //配置PTD13为输入端口
PORTD->PCR[13] = 0x000a0100; //配置PTD13为GPIO，下降沿中断
/*******外部中断配置*******/
S32_NVIC->ICPR[1] = 1 << (62 % 32); //62下面有图片说明，查看S32K144.h
S32_NVIC->ISER[(uint32_t)(PORTD_IRQn) >> 5U] = (uint32_t)(1UL << ((uint32_t)(PORTD_IRQn) & (uint32_t)0x1FU));
S32_NVIC->IP[62] = 0x9; //中断优先级配置为9（0-15）
}
int main(void)
{
WDOG_disable(); //关闭看门狗
SOSC_init_8MHz(); //配置系统振荡器为外部8MHZ
SPLL_init_160MHz(); //使用SOSC 8MHZ配置SPLL 为160 MHz
NormalRUNmode_40MHz(); //配置系列时钟40MHz, 40MHz总线时钟
GPIO_Init(); //配置GPIO端口
while(1)
{
if(PTD->PDIR & (1<<13))
{
PTE->PDOR &= ~(1<<9);//PTE9输出低电平，灯灭
}
}
return 0;
}
/*端口PTD外部中断服务函数*/
void PORTD_IRQHandler(void)//中断服务函数的名由PORTD_IRQn去掉n 加上Handler
{
if((PTD->PDIR & (1<<13))==0x00)
{
PTE->PDOR |= 1<<9;//PTE9输出高电平，点亮LED
}
PORTD->ISFR |= 0x4000;//清除中断标志位
}