ncsim仿真VHDL

ncsim仿真VHDL

1、文件列表

ctrl.vhd

design_io.vhd

tb.vhd

compile.nc

simulate.nc

./shm/shmtb.tcl

 

2、 Compile你的VHDL设计文件[compile.nc]

 

 1 #!/bin/csh -f
 2 #----------------------------------------------------------------------
 3 
 4 # ------------------------------------------------------------------- #
 5 # Directories location
 6 # ------------------------------------------------------------------- #
 7 
 8 setenv src_dir ../src
 9 setenv tb_dir  ./
10 setenv work_dir ./lib
11 
12 # ------------------------------------------------------------------- #
13 # Library creation
14 # ------------------------------------------------------------------- #
15 
16 setenv CDS_VHDL /user/EDA_Tools/Cadence/IUS_11.10_lnx86/tools.lnx86/inca
17 
18 echo "softinclude $CDS_VHDL/files/cds.lib" > cds.lib
19 echo "define work ./lib" >> cds.lib
20 echo " " > hdl.var
21 mkdir -p $work_dir
22 
23 # Compile Key Expander
24 #
25 ncvhdl -v93 -work work $src_dir/ctrl.vhd 
26 
27 #
28 # Compile Testbench 
29 #
30 ncvhdl -v93 -work work $tb_dir/design_io.vhd
31 ncvhdl -v93 -work work $tb_dir/tb.vhd

compile.nc