【发布时间】:2021-12-22 09:13:19
【问题描述】:
我在具有 cortex-M7 架构的 STM32 中使用 freeRTOS CMSIS v1。我目前的目标是研究它并了解“幕后”机制(我为此目的使用调试器)。
我正在尝试使用“上下文切换”功能,但我无法到达那里。有可能达到吗?要查看源代码吗?
谢谢!!
【问题讨论】:
标签: c multithreading real-time stm32 freertos
我在具有 cortex-M7 架构的 STM32 中使用 freeRTOS CMSIS v1。我目前的目标是研究它并了解“幕后”机制(我为此目的使用调试器)。
我正在尝试使用“上下文切换”功能,但我无法到达那里。有可能达到吗?要查看源代码吗?
谢谢!!
【问题讨论】:
标签: c multithreading real-time stm32 freertos
是一个异常处理程序(supervisor call handler):
void xPortPendSVHandler( void )
{
/* This is a naked function. */
__asm volatile
(
" mrs r0, psp \n"
" isb \n"
" \n"
" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
" ldr r2, [r3] \n"
" \n"
" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */
" it eq \n"
" vstmdbeq r0!, {s16-s31} \n"
" \n"
" stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */
" str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
" \n"
" stmdb sp!, {r0, r3} \n"
" mov r0, %0 \n"
" msr basepri, r0 \n"
" dsb \n"
" isb \n"
" bl vTaskSwitchContext \n"
" mov r0, #0 \n"
" msr basepri, r0 \n"
" ldmia sp!, {r0, r3} \n"
" \n"
" ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
" ldr r0, [r1] \n"
" \n"
" ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */
" \n"
" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */
" it eq \n"
" vldmiaeq r0!, {s16-s31} \n"
" \n"
" msr psp, r0 \n"
" isb \n"
" \n"
#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
#if WORKAROUND_PMU_CM001 == 1
" push { r14 } \n"
" pop { pc } \n"
#endif
#endif
" \n"
" bx r14 \n"
" \n"
" .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n"
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
);
}
【讨论】: