Figure 1). The circuit handles only the clock signal or only the data signal. Two npn transistors, connected head-to-head, form the heart of the circuit. I2C signals come from open-collector or open-drain outputs, so can only pull down (sink current). When Enable is high, a low-going SCL signal drives the emitter of one of the transistors as a common-base amplifier. The 10-kΩ resistor in the base circuit provides enough current to saturate the transistor and drop the VCE voltage to approximately 0.1V, thereby pulling the other side low.
The circuit acts like an efficient diode. With Enable low, the hot-swappable side has no effect on the signal, with or without power applied. The two-transistor circuit offers the additional benefit of acting as a level translator between two logic levels. This example shows a buffer-
References 1 and 2 treat similar level-translation circuits.
References
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EDN, Nov 7, 1996, pg 114.
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EDN, Nov 5, 1998, pg 119.