https://mp.weixin.qq.com/s/Aye-SrUUuIP6_o67Rlt5OQ
全加器
逻辑图如下:
参考链接:
https://github.com/ucb-bar/chisel-tutorial/blob/release/src/main/scala/examples/FullAdder.scala
1. 引入Chisel3
2. 继承自Module类
3. 定义输入输出接口
创建输入和输出接口,包括:
a. 输入接口:加数a/b,输入进位cin;
b. 输出接口:和数sum, 输出进位cout;
.W))
a. 使用1.W表示位宽为1位;
b. 使用UInt创建无符号整型数;
c. 使用Input/Output表示接口方向;
关键字表明定义的变量是所属匿名Bundle子类的数据成员;
4. 内部连接
:
c. ^ & |也都是方法名;
5. 生成Verilog
可以直接点运行符号运行。
也可以使用sbt shell执行:
生成Verilog如下:
6. 测试
参考链接:
https://github.com/ucb-bar/chisel-tutorial/blob/release/src/test/scala/examples/FullAdderTests.scala
创建FullAdderTester.scala:
7. 附录
FullAdder.scala:
import chisel3._ class FullAdder extends Module { val io = IO(new Bundle { val a = Input(UInt(1.W)) val b = Input(UInt(1.W)) val cin = Input(UInt(1.W)) val sum = Output(UInt(1.W)) val cout = Output(UInt(1.W)) }) // Generate the sum val a_xor_b = io.a ^ io.b io.sum := a_xor_b ^ io.cin // Generate the carry val a_and_b = io.a & io.b val b_and_cin = io.b & io.cin val a_and_cin = io.a & io.cin io.cout := a_and_b | b_and_cin | a_and_cin } object Main { def main(args: Array[String]): Unit = { chisel3.Driver.execute(Array("--target-dir", "generated/FullAdder"), () => new FullAdder) // chisel3.Driver.execute(args, () => new FullAdder) } }
FullAdderTester.scala:
import chisel3.iotesters.{PeekPokeTester, Driver, ChiselFlatSpec} class FullAdderTester(c: FullAdder) extends PeekPokeTester(c) { for (t <- 0 until 4) { val a = rnd.nextInt(2) val b = rnd.nextInt(2) val cin = rnd.nextInt(2) val res = a + b + cin val sum = res & 1 val cout = (res >> 1) & 1 poke(c.io.a, a) poke(c.io.b, b) poke(c.io.cin, cin) step(1) expect(c.io.sum, sum) expect(c.io.cout, cout) } } object FullAdderTester { def main(args: Array[String]): Unit = { chisel3.iotesters.Driver(() => new FullAdder)(c => new FullAdderTester(c)) } }