握手通信

module handshack
(
    input clk,
    input rst_n,
    input req,
    input [7:0] datain,
    output ack,
    output [7:0] dataout
);

reg reqr1,reqr2,reqr3;
reg [7:0] dataoutr;
reg ackr;

always @ (posedge clk,negedge rst_n)
if(!rst_n)
    {reqr3,reqr2,reqr1} <= 3'b111;
else
    {reqr3,reqr2,reqr1} <= {reqr2,reqr1,req};

wire pos_req1 =reqr1 & ~reqr2;
wire pos_req2 =reqr2 & ~reqr3;
assign dataout = dataoutr;
assign ack =ackr;

always @ (posedge clk,negedge rst_n)
if(!rst_n)
    dataoutr <= 8'h00;
else if(pos_req1) 
    dataoutr<= datain;

always @ (posedge clk,negedge rst_n)
if(!rst_n)
    ackr <= 1'b0;
else if(pos_req2)
    ackr <= 1'b1;
else if(!req)
    ackr <= 1'b0;
endmodule