Hi3521D V100 H.265 CODEC Processor

Hi3521DV100 H.265编解码处理器用户指南

1、##Key Specifications

**
Processor Core
ARM Cortex A7 [email protected] 1.3 GHz
− 32 KB L1 I-cache, 32 KB L1 D-cache
− 256 KB L2 cache
− NEON and FPU
Video Encoding/Decoding Protocols
H.265 Main Profile, Level 5.0 encoding
H.265 Main Profile, Level 5.0 decoding
H.264 Baseline/Main/High Profile, Level 5.1 encoding
H.264 Baseline/Main/High Profile, Level 5.1 decoding
MPEG-4 SP, L0–L3/ASP L0–L5 decoding
MJPEG/JPEG baseline
Video Encoding/Decoding
H.265/H.264/JPEG encoding and decoding of multiple streams
[email protected]/[email protected] H.265/H.264 [email protected] fps H.265/H.264 [email protected] fps JPEG encoding
[email protected]/[email protected] H.265/H.264 [email protected] fps H.265/H.264 [email protected] fps JPEG encoding
[email protected]/[email protected] fps H.265/H.264 [email protected] fps H.265/H.264 [email protected] fps JPEG encoding
[email protected]/H.264decoding
[email protected]/H.264decoding
[email protected]
Constant bit rate (CBR) mode, variable bit rate (VBR) mode, FIXQP mode, adaptive variable bit rate (AVBR) mode, and QpMap mode
Maximum 40 Mbit/s output bit rate
ROI encoding
Color-to-gray encoding
Intelligent Video Analysis
Integrated IVE, supporting various intelligent analysis applications such as motion detection, perimeter defense, and video diagnosis
Video and Graphics Processing
Deinterlacing, sharpening, 3D denoising, dynamic contrast improvement, and demosaic
Anti-flicker for output videos and graphics
1/15x to 16x video scaling
1/2x to 2x graphics scaling
Four Cover regions
OSD overlaying of eight regions Audio Encoding/Decoding
ADPCM, G.711, and G.726 hardware audio encoding
Software audio encoding and decoding complying with
multiple protocols
Hi3521DV100 H.265编解码处理器用户指南


Security Engine


AES, DES, and 3DES algorithms implemented by hardware
Video Interfaces
VI interfaces
− Four 8-bit interfaces or two 16-bit interfaces
− 108MHz/144MHz4xD1/960HTDMinputsforeach8-
bit interface (16xD1/16x960H real-time video inputs in
total)
− 144 MHz/148.5 MHz 2x720p TDM inputs for each 8-
bit interface ([email protected] fps real-time video inputs in
total)
− 4x720p TDM inputs through 148.5 MHz dual-edge
sampling or 297 MHz single-edge sampling for each 8- bit interface ([email protected] fps real-time video inputs in total)
− 148.5MHzBT.1120Y/Cinterleavedmodeforeach8- bit interface ([email protected] fps real-time video inputs in total)
− 2x1080pTDMinputsthrough148.5MHzdual-edge sampling or 297 MHz single-edge sampling for each 8- bit interface ([email protected] fps real-time video inputs in total)
− 1x4M(2560x1440)TDMinputsthrough148.5MHz dual-edge or 297 MHz single-edge sampling for each 8- bit interface ([email protected] fps real-time video inputs in total)
− 148.5MHzBT.1120standardmodeforthe16-bit interface ([email protected] fps real-time video inputs in total)
VO interfaces
− OneHDMI1.4boutputinterfacewiththemaximum
output of 3840 x [email protected] fps
− OneVGAHDoutputinterfacewiththemaximum
output of [email protected] fps
− TwoindependentHDoutputchannels(DHD0and
DHD1), output over any HD interface (HDMI or VGA)
− 36-pictureoutputforDHD0,maximumoutputof3840
x [email protected] fps
− 16-pictureoutputforDHD1,maximumoutputof
[email protected] fps
− One CVBS SD output interface
− Threefull-screenGUIgraphicslayersinARGB1555or
ARGB8888 format for two HD channels and one SD
channel
− TwohardwarecursorlayersinARGB1555or
ARGB8888 format (configurable) with the maximum resolution of 256 x 256
Audio Interfaces
Three unidirectional I2S/PCM interfaces
− Twoinputinterfaces,supporting16multiplexedinputs − Oneoutput,supportingdual-channeloutput
− 16-bitaudioinputsandoutputs 新的改变
Ethernet Ports
One gigabit Ethernet port
− RGMII, RMII, and MII modes
− 10/100 Mbit/s half-duplex or full-duplex
− 1000 Mbit/s full-duplex
− TSO for reducing the CPU usage
Peripheral Interfaces
Two SATA 3.0 interfaces − PM
− eSATA
Two USB 2.0 host ports, supporting the hub
Three UART interfaces, one of which supporting four
wires
One SPI, supporting two CSs
One IR interface
One I2C interface
Multiple GPIO interfaces
Memory Interfaces
One 32-bit DDR3 SDRAM interface
− Maximum frequency of 933 MHz
− ODT
− Maximum capacity of 2 GB
− Automatic power consumption control
SPI NOR/NAND flash interface
− 2 KB/4 KB page size (for the SPI NAND flash)
− 8-bit/1 KB or 24-bit/1 KB ECC (for the SPI NAND
flash)
Embedded 4 KB BOOTROM and 16 KB SRAM
RTC with an Independent Power Supply
Independent battery for supplying power to the RTC Configurable Boot Modes
Booting from the BOOTROM
Booting from the SPI NOR flash
Booting from the SPI NAND flash
SDK
Linux 3.18-based SDK
Audio encoding and decoding libraries complying with
various protocols
High-performance H.265/H.264 PC decoding library
Physical Specifications
Power consumption
− Typical power consumption of 2.5W
− Multi-level power consumption control
Operating voltages
− 0.9 V core voltage
− 1.0V CPU voltage
− 3.3 V I/O voltage
− 1.5 V DDR3 SDRAM interface voltage
Package
− RoHS, TFBGA
− Lead pitch of 0.8 mm (0.03 in.)
− Body size of 19 mm x 19 mm (0.75 in. x 0.75 in.)
Operating temperature ranging from 0°C (32°F) to 70°C
(158°F)
Hi3521DV100 H.265编解码处理器用户指南

Hi3521DV100 H.265编解码处理器用户指南

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