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You might be curious as to how newer generations of processors are able to be faster at the same clock speeds as older processors. Is it just changes in physical architecture or is it something more? Today’s SuperUser Q&A post has the answers to a curious reader’s questions.
您可能想知道新一代处理器如何能够以与旧处理器相同的时钟速度更快。 它只是物理体系结构的变化还是更多？ 今天的“超级用户问答”帖子回答了好奇的读者的问题。
Today’s Question & Answer session comes to us courtesy of SuperUser—a subdivision of Stack Exchange, a community-driven grouping of Q&A web sites.
今天的“问答”环节由SuperUser提供，它是Stack Exchange的一个分支，该社区是由社区驱动的Q＆A网站分组。
Photo courtesy of Rodrigo Senna (Flickr).
问题 (The Question)
SuperUser reader agz wants to know why newer generations of processors are faster at the same clock speed:
SuperUser阅读器agz想知道为什么新一代处理器在相同的时钟速度下会更快：
Why, for example, would a 2.66 GHz dual-core Core i5 be faster than a 2.66 GHz Core 2 Duo, which is also dual-core?
例如，为什么2.66 GHz双核Core i5会比2.66 GHz Core 2 Duo(也是双核)更快？
Is this because of newer instructions that can process information in fewer clock cycles? What other architectural changes are involved?
这是因为更新的指令可以在更少的时钟周期内处理信息吗？ 还要进行哪些其他架构更改？
Why are newer generations of processors faster at the same clock speed?
为什么新一代处理器以相同的时钟速度更快？
答案 (The Answer)
SuperUser contributors David Schwartz and Breakthrough have the answer for us. First up, David Schwartz:
超级用户贡献者David Schwartz和Breakthrough为我们找到了答案。 首先，David Schwartz：
Usually, it is not because of newer instructions. It is just because the processor requires fewer instruction cycles to execute the same instructions. This can be for a large number of reasons:
通常，这不是因为更新了说明。 仅仅是因为处理器需要更少的指令周期来执行相同的指令。 原因可能有很多：
- Large caches mean less time wasted waiting for memory. 大容量缓存意味着更少的时间浪费在等待内存上。
- More execution units means less time waiting to start operating on an instruction. 更多的执行单元意味着更少的时间等待开始对一条指令进行操作。
- Better branch prediction means less time wasted speculatively executing instructions that never actually need to be executed. 更好的分支预测意味着更少的时间浪费在推测性地执行从未真正需要执行的指令上。
- Execution unit improvements mean less time waiting for instructions to complete. 执行单元的改进意味着更少的时间等待指令完成。
- Shorter pipelines means pipelines fill up faster. 较短的管线意味着管线填满更快。
And so on.
等等。
Followed by the answer from Breakthrough:
接下来是突破的答案：
The absolute definitive reference is the Intel 64 and IA-32 Architectures Software Developer Manuals. They detail the changes between architectures and they are a great resource to understand the x86 architecture.
绝对的权威参考是《 Intel 64和IA-32体系结构软件开发人员手册》 。 他们详细介绍了架构之间的变化，并且它们是了解x86架构的重要资源。
I would recommend that you download the combined volumes 1 through 3C (first download link on the page linked above). Volume 1, Chapter 2.2 has the information you want.
我建议您下载组合卷1至3C(上面链接的页面上的第一个下载链接)。 第1卷第2.2章提供了所需的信息。
Some general differences listed in that chapter, going from the Core to the Nehalem/Sandy Bridge micro-architectures are:
从核心到Nehalem / Sandy Bridge微体系结构，该章中列出的一些一般差异是：
- Improved branch prediction, quicker recovery from misprediction 改进分支预测，更快地从错误预测中恢复
- HyperThreading Technology 超线程技术
- Integrated memory controller, new cache hierarchy 集成内存控制器，新的缓存层次结构
- Faster floating-point exception handling (Sandy Bridge only) 更快的浮点异常处理(仅适用于Sandy Bridge)
- LEA bandwidth improvement (Sandy Bridge only) LEA带宽改善(仅适用于Sandy Bridge)
- AVX instruction extensions (Sandy Bridge only) AVX指令扩展(仅适用于Sandy Bridge)
The complete list can be found in the link provided above (Volume 1, Chapter 2.2).
完整列表可以在上面提供的链接中找到(第1卷，第2.2章)。
Make sure to read through more of this interesting discussion via the link below!
请确保通过下面的链接通读更多有关此有趣的讨论的内容！
Have something to add to the explanation? Sound off in the comments. Want to read more answers from other tech-savvy Stack Exchange users? Check out the full discussion thread here.
有什么补充说明吗？ 在评论中听起来不错。 是否想从其他精通Stack Exchange的用户那里获得更多答案？ 在此处查看完整的讨论线程 。
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