系统verilog中的信号量

Question

module sema;
semaphore sem;
initial begin
sem=new(2);

begin
sem.get(1);
  begin
    $display("%t,Event 3", $time);
    sem.put(1);
  end
  sem.get(2);

    $display ("%t, Event1",$time);

  sem.get(1);
  begin
    $display("%t,Event 2",$time);
    sem.put(2);
  end
end
end
endmodule

输出应该是 Event3, Event 2, Event1

Answer 1

您的代码中的所有内容都是程序性的，您需要fork 进程。下面会显示Event3，Event2，Event1

initial begin
  sem=new(2);
  fork
    begin
      sem.get(1);
      $display("%t, Event3", $time);
     #1 sem.put(1);
    end
    begin
      sem.get(2);
      $display ("%t, Event1",$time);
      #1 sem.put(2);
    end
    begin
      sem.get(1);
      $display("%t, Event2",$time);
      #1 sem.put(1);
    end
  join
  #1 $finish;
end