【发布时间】:2011-02-11 08:47:12
【问题描述】:
我正在尝试用 VHDL 语言制作一个 ROM,我正在使用我在 http://www.edaboard.com/thread38052.html 上找到的这个模板:
library ieee;
use ieee.std_logic_1164.all;
entity ROM is
port ( address : in std_logic_vector(3 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity ROM;
architecture behavioral of ROM is
type mem is array ( 0 to 2**4 - 1) of std_logic_vector(7 downto 0);
constant my_Rom : mem := (
0 => "00000000",
1 => "00000001",
2 => "00000010",
3 => "00000011",
4 => "00000100",
5 => "11110000",
6 => "11110000",
7 => "11110000",
8 => "11110000",
9 => "11110000",
10 => "11110000",
11 => "11110000",
12 => "11110000",
13 => "11110000",
14 => "11110000",
15 => "11110000");
begin
process (address)
begin
case address is
when "0000" => data <= my_rom(0);
when "0001" => data <= my_rom(1);
when "0010" => data <= my_rom(2);
when "0011" => data <= my_rom(3);
when "0100" => data <= my_rom(4);
when "0101" => data <= my_rom(5);
when "0110" => data <= my_rom(6);
when "0111" => data <= my_rom(7);
when "1000" => data <= my_rom(8);
when "1001" => data <= my_rom(9);
when "1010" => data <= my_rom(10);
when "1011" => data <= my_rom(11);
when "1100" => data <= my_rom(12);
when "1101" => data <= my_rom(13);
when "1110" => data <= my_rom(14);
when "1111" => data <= my_rom(15);
when others => data <= "00000000";
end case;
end process;
end architecture behavioral;
好吧,问题是我想输入我的 ROM 2000 值。所以我想知道如何使用python制作下一个:
想象一下,您在 .txt 文件中有以下格式的数据:
0 45
1 56
2 78
3 98
所以程序会对数据执行此操作:
0 => "00101101"
1 => "00111000"
2 => "01001110"
3 => "01100010"
这些值 "00101101","00111000","01001110","01100010" 是 45,56,78 y 89 的二进制表示的各自值。 所以,你明白了……
有个小细节,需要指定表示的位数: 如果你不这样做,你可以得到这个:
0 => "101101"
1 => "111000"
2 => "1001110"
3 => "1100010"
非常感谢所有可能的代码片段来完成这个程序
【问题讨论】:
-
+1 表示不想长期做事!
-
2000 个值太多了!!! :)
标签: python code-generation vhdl rom