【发布时间】：2017-07-18 05:56:52
【问题描述】：
我在尝试添加我的整数信号并尝试在我的段上对其进行解码时遇到问题。顺便说一句，我们的项目是尝试在单击一个开关时显示增量值。有 3 个开关（swA、swB、swC）。 最初，所有 3 个段都是 0,0,0 如果单击switchA，它将显示= 1,0,0 然后.. 如果单击switchC，它将显示= 1,0,2 然后.. 如果单击switchB，它将显示= 1,3,2 然后.. 如果你点击switchC，它会显示= 1,3,4
所以算法就是这样。我的问题是加法部分。我的解码器代码很好，但点击时我的序列会跳+4、+2、+8。我认为我的问题出在我的加法算法上，或者我不确定它是否在我的分频上。
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity SwitchCounterModule is
port( SegmentIndicator: inout STD_LOGIC_VECTOR(6 downto 0);
SegmentA : inout STD_LOGIC_VECTOR(6 downto 0);
SegmentB : inout STD_LOGIC_VECTOR(6 downto 0);
SegmentC : inout STD_LOGIC_VECTOR(6 downto 0);
SwitchA : in STD_LOGIC;
SwitchB : in STD_LOGIC;
SwitchC : in STD_LOGIC);
end SwitchCounterModule;
architecture Behavioral of SwitchCounterModule is
signal counter :std_logic_vector(3 downto 0);
signal sumOut1: integer;
begin
process(sumOut1)
begin
sumOut1<=5;
if SwitchA = '1' then
SegmentIndicator <= "0001000"; --A
sumOut1 <= sumOut1 +1;
if(sumOut1>9)then
sumOut1<= 0;
case sumOut1 is
when 0 => SegmentA <="1000000"; -- '0'
when 1 => SegmentA <="1111001"; -- '1'
when 2 => SegmentA <="0100100"; -- '2'
when 3 => SegmentA <="0110000"; -- '3'
when 4 => SegmentA <="0011001"; -- '4'
when 5 => SegmentA <="0010010"; -- '5'
when 6 => SegmentA <="0000010"; -- '6'
when 7 => SegmentA <="1111000"; -- '7'
when 8 => SegmentA <="0000000"; -- '8'
when others => SegmentA <="0010000"; -- '9'
end case;
else
case sumOut1 is
when 0 => SegmentA <="1000000"; -- '0'
when 1 => SegmentA <="1111001"; -- '1'
when 2 => SegmentA <="0100100"; -- '2'
when 3 => SegmentA <="0110000"; -- '3'
when 4 => SegmentA <="0011001"; -- '4'
when 5 => SegmentA <="0010010"; -- '5'
when 6 => SegmentA <="0000010"; -- '6'
when 7 => SegmentA <="1111000"; -- '7'
when 8 => SegmentA <="0000000"; -- '8'
when others => SegmentA <="0010000"; -- '9'
end case;
end if;
elsif SwitchB = '1' then
SegmentIndicator <= "0000011"; --B
sumOut1 <= sumOut1 +1;
if(sumOut1=10)then
sumOut1<= 0;
case sumOut1 is
when 0 => SegmentB <="1000000"; -- '0'
when 1 => SegmentB <="1111001"; -- '1'
when 2 => SegmentB <="0100100"; -- '2'
when 3 => SegmentB <="0110000"; -- '3'
when 4 => SegmentB <="0011001"; -- '4'
when 5 => SegmentB <="0010010"; -- '5'
when 6 => SegmentB <="0000010"; -- '6'
when 7 => SegmentB <="1111000"; -- '7'
when 8 => SegmentB <="0000000"; -- '8'
when others => SegmentB <="0010000"; -- '9'
end case;
else
case sumOut1 is
when 0 => SegmentB <="1000000"; -- '0'
when 1 => SegmentB <="1111001"; -- '1'
when 2 => SegmentB <="0100100"; -- '2'
when 3 => SegmentB <="0110000"; -- '3'
when 4 => SegmentB <="0011001"; -- '4'
when 5 => SegmentB <="0010010"; -- '5'
when 6 => SegmentB <="0000010"; -- '6'
when 7 => SegmentB <="1111000"; -- '7'
when 8 => SegmentB <="0000000"; -- '8'
when others => SegmentB <="0010000"; -- '9'
end case;
end if;
elsif SwitchC = '1' then
SegmentIndicator <= "1000110"; --C
sumOut1 <= sumOut1 +1;
if(sumOut1=10)then
sumOut1<= 0;
case sumOut1 is
when 0 => SegmentC <="1000000"; -- '0'
when 1 => SegmentC <="1111001"; -- '1'
when 2 => SegmentC <="0100100"; -- '2'
when 3 => SegmentC <="0110000"; -- '3'
when 4 => SegmentC <="0011001"; -- '4'
when 5 => SegmentC <="0010010"; -- '5'
when 6 => SegmentC <="0000010"; -- '6'
when 7 => SegmentC <="1111000"; -- '7'
when 8 => SegmentC <="0000000"; -- '8'
when others => SegmentC <="0010000"; -- '9'
end case;
else
case sumOut1 is
when 0 => SegmentC <="1000000"; -- '0'
when 1 => SegmentC <="1111001"; -- '1'
when 2 => SegmentC <="0100100"; -- '2'
when 3 => SegmentC <="0110000"; -- '3'
when 4 => SegmentC <="0011001"; -- '4'
when 5 => SegmentC <="0010010"; -- '5'
when 6 => SegmentC <="0000010"; -- '6'
when 7 => SegmentC <="1111000"; -- '7'
when 8 => SegmentC <="0000000"; -- '8'
when others => SegmentC <="0010000"; -- '9'
end case;
end if;
else
sumOut1<=sumOut1;
SegmentA<=SegmentA;
SegmentB<=SegmentB;
SegmentC<=SegmentC;
end if;
end process;
end Behavioral;
【问题讨论】：
-
你的进程对
sumOut1很敏感。sumOut1因此是一个输入。但是该过程也修改了sumOut1，因此这也是一个输出。您创建了一个组合循环。此外，敏感度列表是不完整的：开关也是输入。没有任何类型的时钟，所以没有寄存器。你认为你的电路将如何存储开关上两个动作之间的电流值？您可能应该停止作为软件工程师的思考，并首先决定您需要哪些硬件（还没有 VHDL，只有纸和铅笔）。接下来只有编码。 -
综合工具实际上做了一些“有点”工作的实现，这给我留下了深刻的印象。因为这种描述很难映射到 FPGA。您确实需要实现时钟同步逻辑。不要忘记在外部开关上使用同步器和去抖逻辑。
-
您应该使用
ieee.numeric_std而不是ieee.std_logic_arith和ieee.std_logic_unsigned。后者实际上不是标准的。