【发布时间】：2015-08-05 03:55:49
【问题描述】：
所以我正在尝试编写一个运行简单自动售货机的 VHDL 程序。它需要 25 美分、5 美分和 1 美分，并在各州之间移动 Start，以 5 美分为增量达到 45 美分。当状态达到 25 美分时，它分发一个产品，如果它超过 25，比如说之前的状态是 20，并且添加四分之一以使其达到 45，那么它会向下级联状态，分发变化直到达到 25。我还设置了重置。
现在我遇到的问题很简单，但令人沮丧的是含糊不清。有两个进程，第一个 fsm1 保存所有代码，用于在不同的更改状态等之间移动。第二个进程基本上是为了允许异步重置。这是我遇到问题的第二个进程 fsm2。就像现在一样，我收到一个语法错误，它只是说'AND'附近有问题。而已。如果有人能弄清楚问题所在，我将不胜感激。代码如下。
提前致谢。
-- Vending Machine FSM from Lab 8
-- There are 10 States, 3 Inputs, and 2 Outputs
-- When State is Start, Product is 0, Change is 0
-- Start moves to Five when Nickle is Pushed
-- Start moves to Ten when Dime is Pushed
-- Start moves to Twentyfive when Quarter is Pushed
-- When State is Five, Product is 0, Change is 0
-- Five moves to Ten when Nickle is Pushed
-- Five moves to Fifteen when Dime is Pushed
-- Five moves to Thirty when Quarter is Pushed
-- When State is Ten, Product is 0, Change is 0
-- Ten moves to Fifteen when Nickle is Pushed
-- Ten moves to Twenty when Dime is Pushed
-- Ten moves to Thirtyfive when Quarter is Pushed
-- When State is Fifteen, Product is 0, Change is 0
-- Fifteen moves to Twenty when Nickle is Pushed
-- Fifteen moves to Twentyfive when Dime is Pushed
-- Fifteen moves to Fourty when Quarter is Pushed
-- When State is Twenty, Product is 0, Change is 0
-- Twenty moves to Twentyfive when Nickle is Pushed
-- Twenty moves to Thirty when Dime is Pushed
-- Twenty moves to Fourtyfive when Quarter is Pushed
-- When State is Twentyfive, Product is 1, Change is 0
-- Twentyfive moves to Start unconditionally
-- When State is Thirty, Product is 0, Change is 1
-- Thirty moves to Twentyfive unconditionally
-- When State is Thirtyfive, Product is 0, Change is 1
-- Thirtyfive moves to Thirty unconditionally
-- When State is Fourty, Product is 0, Change is 1
-- Fourty moves to Thirtyfive unconditionally
-- When State is Fourtyfive, Product is 0, Change is 1
-- Fourtyfive moves to Fourty unconditionally
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY vending IS
PORT (
reset : IN std_logic;
clock : IN std_logic;
QDN : IN std_logic_vector(2 DOWNTO 0);
PC : OUT std_logic_vector(1 DOWNTO 0)
);
END vending;
ARCHITECTURE behavior OF vending IS
TYPE statetype IS (Start, Five, Ten, Fifteen, Twenty, Twentyfive, Thirty, Thirtyfive, Fourty, Fourtyfive);
SIGNAL currentstate, nextstate : statetype;
BEGIN
fsm1: PROCESS (QDN, currentstate)
BEGIN
CASE currentstate IS
WHEN Start =>
PC <= "00";
CASE QDN IS
WHEN "000" =>
nextstate <= Start;
WHEN "001" =>
nextstate <= Five;
WHEN "010" =>
nextstate <= Ten;
WHEN "100" =>
nextstate <= Twentyfive;
WHEN OTHERS =>
nextstate <= Start;
END CASE;
WHEN Five =>
PC <= "00";
CASE QDN IS
WHEN "000" =>
nextstate <= Five;
WHEN "001" =>
nextstate <= Ten;
WHEN "010" =>
nextstate <= Fifteen;
WHEN "100" =>
nextstate <= Thirty;
WHEN OTHERS =>
nextstate <= Start;
END CASE;
WHEN Ten =>
PC <= "00";
CASE QDN IS
WHEN "000" =>
nextstate <= Ten;
WHEN "001" =>
nextstate <= Fifteen;
WHEN "010" =>
nextstate <= Twenty;
WHEN "100" =>
nextstate <= Thirtyfive;
WHEN OTHERS =>
nextstate <= Start;
END CASE;
WHEN Fifteen =>
PC <= "00";
CASE QDN IS
WHEN "000" =>
nextstate <=Fifteen;
WHEN "001" =>
nextstate <= Twenty;
WHEN "010" =>
nextstate <= Twentyfive;
WHEN "100" =>
nextstate <= Fourty;
WHEN OTHERS =>
nextstate <= Start;
END CASE;
WHEN Twenty =>
PC <= "00";
CASE QDN IS
WHEN "000" =>
nextstate <= Twenty;
WHEN "001" =>
nextstate <= Twentyfive;
WHEN "010" =>
nextstate <= Thirty;
WHEN "100" =>
nextstate <= Fourtyfive;
WHEN OTHERS =>
nextstate <= Start;
END CASE;
WHEN Twentyfive =>
PC <= "10";
nextstate <= Start;
WHEN Thirty =>
PC <= "01";
nextstate <= Twentyfive;
WHEN Thirtyfive =>
PC <= "01";
nextstate <= Thirty;
WHEN Fourty =>
PC <= "01";
nextstate <= Thirtyfive;
WHEN Fourtyfive =>
PC <= "01";
nextstate <= Fourty;
END CASE;
END PROCESS;
fsm2: PROCESS (reset, clock)
BEGIN
IF (reset = '0') THEN
currentstate <= Start;
ELSEIF (clock'EVENT) AND (clock = '1') THEN
currentstate <= nextstate;
END IF;
END PROCESS;
END behavior;
【问题讨论】：
标签： syntax-error vhdl